<div dir="ltr"><div class="gmail_quote"><div dir="ltr"><div dir="ltr"><div dir="ltr"><div dir="ltr">(Apologies for the multiple posting)<br clear="all"><div><div dir="ltr"><div dir="ltr"><div style="color:rgb(34,34,34);text-transform:none;text-indent:0px;letter-spacing:normal;font-family:Arial,Helvetica,sans-serif;font-size:small;font-style:normal;font-weight:400;word-spacing:0px;white-space:normal;background-color:rgb(255,255,255)"><br></div><div style="color:rgb(34,34,34);text-transform:none;text-indent:0px;letter-spacing:normal;font-family:Arial,Helvetica,sans-serif;font-size:small;font-style:normal;font-weight:400;word-spacing:0px;white-space:normal;background-color:rgb(255,255,255)">I'd like to kindly invite to the following seminar which will be held in Via Roma 56 (S. Niccolo' building), Siena AT 14:00 (sharp) of the 3rd DECEMBER 2019 <br></div></div></div></div><br></div> I remain available for further information. Please feel free to extend this invitation to whom might be interested. Thanks.<br clear="all"><div><div dir="ltr"><div dir="ltr"><div>Roberto Giorgi.<br></div></div></div></div><br><div class="gmail_quote"><div dir="ltr"><div>===================================================================<br></div><div>* TITLE:<br><b><span style="font-size:17pt;line-height:107%;font-family:Arial,sans-serif">DataFlow
SuperComputing for BigData DeepAnalytics</span></b> <br><br>* ABSTRACT: <br></div><div><p style="text-align:justify;margin:0in 0in 6pt;font-size:12pt;font-family:"Times New Roman",serif"><span style="font-size:11pt;font-family:Calibri,sans-serif">This
seminar analyses the essence of DataFlow SuperComputing, defines its advantages
and sheds light on the related programming model that corresponds to the recent
Intel patent about the future Intel's dataflow processor.</span></p><p style="text-align:justify;margin:0in 0in 6pt;font-size:12pt;font-family:"Times New Roman",serif"><span style="font-size:11pt;font-family:Calibri,sans-serif">According
to Alibaba and Google, as well as the open literature, the DataFlow paradigm,
compared to the ControlFlow paradigm, offers: (a) Speedups of at least 10x to
100x and sometimes much more (depends on the algorithmic characteristics of the
most essential loops and the spatial/temporal characteristics of the Big Data
Streem, etc.), (b) Potentials for a better precision (depends on the
characteristics of the optimizing compiler and the operating system, etc.), (c)
Power reduction of at least 10x (depends on the clock speed and the internal
architecture, etc.), and (d) Size reduction of well over 10x (depends on the chip
implementation and the packaging technology, etc.). However, the programming
paradigm is different, and has to be mastered.</span></p><p style="text-align:justify;margin:0in 0in 6pt;font-size:12pt;font-family:"Times New Roman",serif"><span style="font-size:11pt;font-family:Calibri,sans-serif">This
presentation explains the programming paradigm, using Maxeler as an example and
sheds light on the ongoing research, which, in the case of the speaker, was
highly influenced by four different Nobel Laureates: (a) from Richard Feynman
it was learned that future computing paradigms will be successful only if the
amount of data communications is minimized; (b) from Ilya Prigogine it was
learned that the entropy of a computing system would be minimized if spatial
and temporal data get decoupled; (c) from Daniel Kahneman it was learned that
the system software should offer options related to approximate computing; and
(d) from Andre Geim it was learned that the system software should be able to
trade between latency and precision. The approach that satisfies all the above
requirements is referred to as the Ultimate DataFlow. The existing Maxeler
programming model is applicable to Ultimate DataFlow, too.</span></p><p style="text-align:justify;margin:0in 0in 6pt;font-size:12pt;font-family:"Times New Roman",serif"><span style="font-size:11pt;font-family:Calibri,sans-serif">The
presentation concludes with the latest achievements of Maxeler Technologies in
the current and previous year, like emulation of Quark-related processes
available thru Amazon AWS and endorsed by the Nobel Laureate Jerome Friedman
(Nobel Prize for the discovery of Quark) and tensor calculus applicable for
emulation of processes related to QuasiCrystals (discovered by Nobel Laureate
Dan Shechtman). It also includes examples related to finances (JPMorgan and
CitiBank) and trading (Chicago Mercantile Exchange CME and NASDAQ), as well as
those related to: math algorithms, image processing, machine learning, and
artificial intelligence. All these examples prepare the attendees for
utilization of the future DataFlow engine of Intel, announced through a recent
patent by Intel, which was accompanied by an Intel press release stating that
DataFlow represents the major paradigm shift in computing, in the century after
von Neumann (available on request).</span></p><p style="text-align:justify;margin:0in 0in 6pt;font-size:12pt;font-family:"Times New Roman",serif"><span style="font-size:11pt;font-family:Calibri,sans-serif">This
seminar also offers plenty of hands-on opportunities for attendees, related to
all subjects mentioned above. The first 45-minutes of this seminar correspond
to the invited key talk at the International SuperComputing Conference,
ExaScale Track in Frankfurt, Germany, in June 2018.</span></p><p class="MsoNormal" style="margin:0cm 0cm 0.0001pt;line-height:normal;background-image:initial;background-position:initial;background-size:initial;background-repeat:initial;background-origin:initial;background-clip:initial;font-size:11pt;font-family:Calibri,sans-serif">
</p><p class="MsoNormal" style="margin:0in 0in 0.0001pt;line-height:normal;background-image:initial;background-position:initial;background-size:initial;background-repeat:initial;background-origin:initial;background-clip:initial;font-size:11pt;font-family:Calibri,sans-serif"><span style="font-size:10pt">The
opening presentation is followed by two half-day hands-on workshop for students
who like to become fluent in the MaxJ dataflow programming language.</span><span style="font-size:10pt;font-family:Arial,sans-serif"></span></p><p class="MsoNormal" style="text-align:justify"><span lang="EN-US"><br></span></p></div><div>===================================================================<br>* ABOUT THE SPEAKER: </div><div>Prof. Veljko Milutinovic (1951) received his PhD from the University of<br>Belgrade in Serbia, spent about a decade on various faculty positions in<br>the USA (mostly at Purdue University and more recenlty at the Indiana<br>University in Bloomington), and was a co-designer of the DARPAs first<br>GaAs RISC microprocessor at 200MHz (about a decade before commercial<br>efforts on the same speed) and the DARPAs first GaAs Systolic Array with<br>4096 processors on 200MHz (both well documented in the open literature).<br>Later, for about three decades, he taught and conducted research at the<br>University of Belgrade, in EE, MATH, BA, and PHYS/CHEM. Now he serves as<br>a Senior Advisor to Maxeler Technologies in London, UK, Scientific<br>Advisor to the Vienna Congress COMSULT, Research Director of MECOnet of<br>Podgorica, Montenegro, and the Chairman of the Board of IPSI Belgrade (a<br>spin-off of Fraunhofer IPSI from Darmstadt, Germany). His research is<br>mostly in datamining algorithms and dataflow computing, with the<br>emphasis on mapping of data analytics algorithms onto fast energy<br>efficient architectures. For 10 of his books, forewords were written by<br>10 different Nobel Laureates with whom he cooperated on his past<br>industry sponsored projects. He has over 100 SCI journal papers (mostly<br>in IEEE and ACM journals), well over 1000 Thomson-Reuters citations,<br>well over 1000 SCOPUS citations and well over 4000 Google Scholar<br>citations. Short or long courses on the subject he delivered so far in a<br>number of universities worldwide: MIT, Harvard, Boston, NEU, Dartmouth,<br>U of Massachusetts at Amherst, USC, UCLA, Columbia, NYU, Princeton,<br>NJIT, CMU, Temple, Purdue, IU, UIUC, Michigan, Wisconsin, Minnesota,<br>FAU, FIU, Miami, Central Florida, Alabama, Tennessee, GeorgiaTech,<br>OhioState, Imperial, King's, Manchester, Haddersfield, Cambridge,<br>Oxford, Dublin, Cork, Cardiff, Edinburgh, EPFL, ETH, TUWIEN, UNIWIE,<br>Karlsruhe, Stuttgart, Bonn, Frankfurt, Heidelberg, Aachen, Darmstadt,<br>Dortmund, KTH, Uppsala, Karlskrona, Karlstad, Napoli, Salerno, Siena,<br>Pisa, Barcelona, Madrid, Valencia, Oviedo, Ankara, Bogazici, Koc,<br>Istanbul, Technion, Haifa, BerSheba, Eilat, etc, etc. Also at the World<br>Bank in Washington DC, IMF, the Telenor Bank of Norway, the Reiffeisen<br>Bank of Austria, Brookhaven National Laboratory, Lawrence Livermore<br>National Laboratory, IBM TJ Watson, HP Encore Labs, Intel Oregon,<br>Qualcomm VP, NCR, RCA, Fairchild, Honeywell, Yahoo NY, Google CA,<br>Microsoft, Finsoft, ABB Zurich, Oracle Zurich, and many other industrial<br>labs, as well as at Tsinghua, Shandong, NIS of Singapore, NTU of<br>Singapore, Tokyo, Sendai, Seoul, Pusan, Sydney, Hobart, Auckland,<br>Wellington, Toronto, Montreal, MexicoCity, Durango, etc.<br><br>=====================================================================<br><br>Accompanying Textbooks and Journal Papers:<br><br>Milutinovic, V., et al,<br>Guide to DataFlow SuperComputing,<br>Springer,<br>2015 (one textbook, part I)<br>and 2017 (two textbooks, parts II and III).<br><br>Hurson, A., Milutinovic, V., editors,<br>Advances in Computers: DataFlow,<br>Elsevier,<br>2015 (one SCI textbook)<br>and 2017 (two SCI textbooks).<br><br>Trifunovic, N., Milutinovic, V. et al,<br>"The <a href="http://AppGallery.Maxeler.com" target="_blank">AppGallery.Maxeler.com</a> for BigData SuperComputing,"<br>Journal of Big Data, Springer,<br>2016.<br><br>Trifunovic, N., Milutinovic, V. et al,<br>"Paradigm Shift in SuperComputing: DataFlow vs ControlFlow,"<br>Journal of Big Data,<br>2015.<br><br>Milutinovic, V.,<br>"The HoneyComb Architecture,"<br>Proceedings of the IEEE, 1989.<br><br>Milutinovic, V. et all,<br>"Splitting Spatial and Temporal Localities for Entropy Minimiation"<br>Tutorial of the IEEE ISCA, 1995.<br><br>Jovanovic, Z., Milutinovic, V.,<br>"FPGA Accelerator for Floating-Point Matrix Multiplication,"<br>The IET Computers and Digital Techniques Premium Award for 2014,<br>IET (formerly IEE), Volume 6, Issue 4,<br>2012 (pp. 249-256).<br><br>Milutinovic, V.,<br>"A Comparison of Suboptimal Detection Algorithms<br>(Suboptimal Algorithms for Data Analytics),"<br>Proceedings of the IEE (now IET),<br>1988.<br><br>Flynn, M., Mencer, O., Milutinovic, V., at al,<br>Moving from PetaFlops to PetaData,<br>Communications of the ACM,<br>May 2013.<br><br>Trobec, R. Vasiljevic, R., Tomasevic, M., Milutinovic, V., et al,<br>"Interconnection Networks for PetaComputing,"<br>ACM Computing Surveys,<br>November 2016.<br><br>Kotlar, M., Milutinovic, V.,<br>"The Tensor Calculus Operations for the Data Flow Paradigm,"<br>The ExaComm Workshop of the International Supercomputing Conference,<br>Frankfurt, Germany, June 28, 2018.<br><br>Milutinovic, V.,<br>"The Ultimate DataFlow", Published by Springer in 2019,<br>Invited Key Talk at the ExaComm Workshop of the ISC,<br>Frankfurt, Germany, June 28, 2018.</div><div><br></div><div><div><img src="cid:ii_k3ilszfg1" alt="191203Milutinovic-seminar_announnce.PNG" width="361" height="542"><br></div></div><div><br></div><div><div><span style="font-size:12.8px">----------------------------------</span><br></div><div>Q: Why is this email four sentences or less?<br>A: <a href="http://four.sentenc.es/" target="_blank">http://four.sentenc.es</a><br>----------------------------------<br>Roberto Giorgi, PhD --- <a href="http://www.dii.unisi.it/~giorgi" target="_blank">http://www.dii.unisi.it/~giorgi</a></div></div></div></div><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr"><div dir="ltr"><div dir="ltr"><div class="gmail_quote"><div dir="ltr"><div><div class="gmail_quote"><div dir="ltr"><div><div dir="ltr"><div dir="ltr"></div></div></div></div>
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